A major trend in the electronics industry is to integrate various functions onto a single integrated circuit, thereby increasing performance, reducing system size, and improving system reliability. Many such applications require a combination of analog and digital functions.
To optimize the performance of both analog and digital functions, two semiconductor technologies are desirable. For analog functions, bipolar technology produces superior circuits due to its high voltage capabilities, low noise and faster speed. On the other hand, CMOS technology is generally superior for digital circuits, due to its high component packing density and its low power requirements. In order to optimize both the digital and the analog aspects of an integrated application, merged bipolar/CMOS technologies (hereinafter "BiCMOS") have been developed which allow both technologies to be used in a single integrated circuit.
Two basic BiCMOS processes, a bipolar-based BiCMOS process and a CMOS-based (Nwell-based) BiCMOS process, are typically used. The bipolar-based BiCMOS process has the capability of handling high voltages for analog functions, but suffers from several deficiencies. First, the bipolar devices are optimized at the expense of the CMOS devices, although the CMOS devices are generally the most used device in the integrated circuit; typically, a circuit comprises 80-90% digital functions. Second, the NPN size is larger in the bipolar-based process, due to deep junction isolation. Third, the bipolar-based process mandates a Pwell-CMOS process, which is not the typical choice of ASIC standard cell libraries, since the Pwell-CMOS process optimizes the slower PMOS device at the expense of the faster NMOS device.
The second BiCMOS process, a Nwell-based process, has the advantages of being compatible with many ASIC standard cell libraries, and supplies the NMOS devices with a lightly doped p-epitaxy layer, resulting in fast NMOS devices. Prior art Nwell devices, however, are inadequate for mixed analog-digital applications in which high voltage bipolar devices are necessary. The Nwell process flow sequence does not lend itself to high voltage (greater than five volts) applications without altering the characteristics of the CMOS devices. Furthermore, the Nwell-based process does not provide a low sheet base needed for good analog functions.
Many standard "cells" have been developed for bipolar and CMOS applications. The use of these cells reduces design time and eliminates design errors. However, the standard CMOS cells cannot be used with the prior art BiCMOS processes which are extended to high voltage applications, since the characteristics of the resulting CMOS devices is different than those for which the cells were designed. Recharacterization, or redesign, of the standard cell libraries to accommodate a new process is time consuming and expensive.
Therefore, a need exists in the industry for a BiCMOS technology which is capable of providing high performance analog and digital functions while allowing the use of existing CMOS standard cell libraries as a subset of the BiCMOS library. Furthermore, it is desirable that the bipolar aspect of the BiCMOS technology be capable of handling voltages in the twenty to thirty volt range.